6.2 Device level specifications. Infineon CY8C4045LQI-S412, CY8C4045LQI-S413, CY8C4025AZI-S413T, CY8C4024LQI-S412, CY8C4025AZQ-S403, CY8C4024LQI-S403T, CY8C4025LQI-S412, CY8C4025LQI-S402T, CY8C4045LQI-S411, CY8C4024AXI-S412

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6.2 Device level specifications. Infineon CY8C4045LQI-S412, CY8C4045LQI-S413, CY8C4025AZI-S413T, CY8C4024LQI-S412, CY8C4025AZQ-S403, CY8C4024LQI-S403T, CY8C4025LQI-S412, CY8C4025LQI-S402T, CY8C4045LQI-S411, CY8C4024AXI-S412 | Manualzz

PSoC™ 4 MCU: PSoC™ 4000S

Based on Arm® Cortex®-M0+ CPU

Electrical specifications

6.2

Device level specifications

All specifications are valid for –40°C  T

1.71 V to 5.5 V, except where noted.

A

 105°C and T

J

 125°C, except where noted. Specifications are valid for

Table 4 DC specifications

Typical values measured at V

DD

= 3.3 V and 25°C.

Spec ID Parameter Description

SID53

SID54

V

SID255 V

V

DD

DD

CCD

Power supply input voltage

Power supply input voltage

(V

CCD

= V

DD

= V

DDA

)

Output voltage

(for core logic)

External regulator voltage bypass

Min Typ Max Units Details/conditions

1.8

– 5.5

Internally regulated supply

1.71

1.8

1.89

V

SID55 C

EFC

SID56 C

EXC

Power supply bypass capacitor

0.1

1

µF

Active Mode, V

DD

= 1.8 V to 5.5 V. Typical values measured at VDD = 3.3 V and 25°C.

SID10 I

DD5

Execute from flash;

CPU at 6 MHz

– 1.2

2.0

SID16 I

DD8

Execute from flash;

CPU at 24 MHz

– 2.4

4.0

mA

Internally unregulated supply

X5R ceramic or better

X5R ceramic or better

SID19 I

DD11

Execute from flash;

CPU at 48 MHz

Sleep Mode, VDDD = 1.8 V to 5.5 V (Regulator on)

SID22

SID25 I

I

DD17

DD20

I

2 comparators on

I 2

C wakeup WDT, and

C wakeup, WDT, and comparators on

4.6

1.1

1.4

Sleep Mode, V

DDD

= 1.71 V to 1.89 V (Regulator bypassed)

SID28 I

DD23

I 2 C wakeup, WDT, and

Comparators on

SID28A I

DD23A

I

2

C wakeup, WDT, and

Comparators on

0.7

0.9

Deep Sleep Mode, V

DD

= 1.8 V to 3.6 V (Regulator on)

SID31 I

DD26

Deep Sleep Mode, V

DD

I 2 C wakeup and WDT on

= 3.6 V to 5.5 V (Regulator on)

I

2

C wakeup and WDT on

– 2.5

SID34 I

DD29

Deep Sleep Mode, V

DD

= V

SID37 I

DD32

XRES Current

I 2

– 2.5

CCD

= 1.71 V to 1.89 V (Regulator bypassed)

C wakeup and WDT on – 2.5

SID307 I

DD_XR

Supply current while XRES asserted

– 2

5.9

1.6

1.9

1.1

60

60

60

5 mA

6 MHz

12 MHz mA 12 MHz

µA –

µA –

µA – mA –

Datasheet 22 002-00123 Rev. *O

2022-07-28

PSoC™ 4 MCU: PSoC™ 4000S

Based on Arm® Cortex®-M0+ CPU

Electrical specifications

Table 5 AC specifications

Spec ID Parameter

SID48 F

CPU

SID49

[2]

T

SLEEP

SID50

[2]

T

DEEPSLEEP

Description

CPU frequency

Wakeup from Sleep mode

Wakeup from Deep Sleep mode

Min

DC

Typ

0

35

Max Units Details/conditions

48

MHz 1.71 V  V

DD

µs

 5.5 V

Note

2. Guaranteed by characterization.

Datasheet 23 002-00123 Rev. *O

2022-07-28

PSoC™ 4 MCU: PSoC™ 4000S

Based on Arm® Cortex®-M0+ CPU

Electrical specifications

6.2.1

GPIO

Table 6 GPIO DC specifications

Spec ID Parameter Description

SID57

SID58

SID241

SID242

SID243

SID244

SID59

SID60

V

V

V

V

V

V

V

V

IH

[3]

IL

IH

[3]

IL

IH

[3]

IL

OH

OH

Input voltage high threshold

Input voltage low threshold

LVTTL input,

V

DDD

< 2.7 V

LVTTL input,

V

DDD

< 2.7 V

LVTTL input,

V

DDD

 2.7 V

LVTTL input,

V

DDD

 2.7 V

Output voltage high level

Output voltage high level

SID61

SID62

SID62A

SID63

SID64

SID65

SID66

SID67

SID68

[4]

[4]

SID68A

SID69

[4]

SID69A

[4]

[4]

I

I

I

V

V

V

R

R

IL

OL

OL

OL

PULLUP

PULLDOWN

C

IN

V

HYSTTL

V

V

HYSCMOS

HYSCMOS5V5

DIODE

TOT_GPIO

Min

0.7 

0.7 

V

V

2.0

DDD

DDD

 V

DDD

 V

DDD

Typ

– 0.3 

– 0.6

– 0.5

Output voltage low level

Output voltage low level

Output voltage low level

Pull-up resistor

Pull-down resistor

Input leakage current

(absolute value)

Input capacitance

Input hysteresis LVTTL

3.5

3.5

25

Input hysteresis CMOS 0.05 × V

DDD

Input hysteresis CMOS 200

Current through protection diode to

V

DD

/V

SS

Maximum total source or sink chip current

5.6

5.6

40

0.3

Max

8.5

8.5

2

7

 V

 V

0.8

0.6

0.6

0.4

100

200

DDD

DDD

Units Details/conditions

CMOS input

CMOS input

– k

V

Ω

I

OH

= 4 mA at 3 V V

I

OH

DDD

= 1 mA at 3 V V

DDD

I

OL

= 4 mA at 1.8 V V

I

OL

DDD

= 10 mA at 3 V V

DDD

I = 3 mA at 3 V V

DDD

OL

– nA 25°C, V

DDD

= 3.0 V pF – mV

V

V

V

DDD

 2.7 V

DD

< 4.5 V

DD

> 4.5 V

µA – mA –

Notes

3. V

IH

must not exceed V

DDD

+ 0.2 V.

4. Guaranteed by characterization.

Datasheet 24 002-00123 Rev. *O

2022-07-28

PSoC™ 4 MCU: PSoC™ 4000S

Based on Arm® Cortex®-M0+ CPU

Electrical specifications

Table 7 GPIO AC Specifications

(Guaranteed by characterization)

Spec ID Parameter

SID70 T

RISEF

Description

Rise time in fast strong mode

SID71 T

FALLF

Fall time in fast strong mode

SID72

SID73

SID74

SID75

SID76

T

T

F

F

F

SID245 F

SID246 F

RISES

FALLS

GPIOUT1

GPIOUT2

GPIOUT3

GPIOUT4

GPIOIN

Rise time in slow strong mode

Fall time in slow strong mode

GPIO F

OUT

;

3.3 V  V

DDD

 5.5 V; fast strong mode

GPIO F

OUT

;

1.71 V  V

DDD

 3.3 V; fast strong mode

GPIO F

OUT

;

3.3 V  V

DDD

 5.5 V; slow strong mode

GPIO F

OUT

;

1.71 V  V

DDD

 3.3 V; slow strong mode

GPIO input operating frequency;

1.71 V  V

DDD

 5.5 V

Min

2

2

10

10

Typ

Max Units Details/conditions

12

12 ns

3.3 V V

DDD

,

Cload = 25 pF

3.3 V V

DDD

,

Cload = 25 pF

60

60

3.3 V V

DDD

,

Cload = 25 pF

3.3 V V

DDD

,

Cload = 25 pF

33

90/10%, 25 pF load,

60/40 duty cycle

16.7

90/10%, 25 pF load,

60/40 duty cycle

7

3.5

MHz

90/10%, 25 pF load,

60/40 duty cycle

90/10%, 25 pF load,

60/40 duty cycle

48 90/10% V

IO

Datasheet 25 002-00123 Rev. *O

2022-07-28

PSoC™ 4 MCU: PSoC™ 4000S

Based on Arm® Cortex®-M0+ CPU

Electrical specifications

6.2.2

XRES

Table 8

SID77 V

SID78 V

IH

IL

XRES DC specifications

Spec ID Parameter

SID79 R

PULLUP

SID80 C

IN

Description

Input voltage high threshold 0.7 × V

DDD

Input voltage low threshold –

Pull-up resistor

Input capacitance

Min

SID81

[5]

V

HYSXRES

Input voltage hysteresis –

SID82 I

DIODE

Current through protection diode to V

DD

/V

SS

Typ

Max Units Details/conditions

V CMOS Input

– 0.3 × V

DDD

60 –

– 7 k Ω – pF –

100 – mV

Typical hysteresis is 200 mV for

V

DD

> 4.5 V

– 100 µA –

Table 9

Spec ID

SID83

[5]

BID194

[5]

T

T

XRES AC specifications

Parameter

RESETWIDTH

RESETWAKE

Wake-up time from reset release

Description

Reset pulse width

Min

1

Typ Max Units Details/conditions

– – µs –

– 2.7

ms –

Note

5. Guaranteed by characterization.

Datasheet 26 002-00123 Rev. *O

2022-07-28

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