6.3 Analog peripherals. Infineon CY8C4045LQI-S412, CY8C4045LQI-S413, CY8C4025AZI-S413T, CY8C4024LQI-S412, CY8C4025AZQ-S403, CY8C4024LQI-S403T, CY8C4025LQI-S412, CY8C4025LQI-S402T, CY8C4045LQI-S411, CY8C4024AXI-S412
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PSoC™ 4 MCU: PSoC™ 4000S
Based on Arm® Cortex®-M0+ CPU
Electrical specifications
6.3
6.3.1
Analog peripherals
Comparator
Table 10
SID84
SID85
SID86
SID87
SID247 V
SID247A V
SID88
SID88A C
SID89
SID248 I
SID259 I
SID90
I
V
V
V
V
C
Z
OFFSET1
OFFSET2
HYST
ICM1
ICM2
ICM3
MRR
MRR
CMP1
CMP2
CMP3
CMP
Comparator DC specifications
Spec ID Parameter Description
Input offset voltage, factory trim
Input offset voltage, custom trim
Hysteresis when enabled
Input common mode voltage in normal mode
Input common mode voltage in low power mode
Input common mode voltage in ultra low power mode
Common mode rejection ratio
Common mode rejection ratio
Block current, normal mode
Block current, low power mode
Block current in ultra low-power mode
DC Input impedance of comparator
50
42
–
–
–
–
0
Min
–
Typ
–
Max
±10
– ±4
10 35
– V
DDD
– 0.1
Units Details/conditions
– mV
–
–
Modes 1 and 2
0 – V
DDD V
–
0 – V
DDD
– 1.15
V
–40°C
≥ 2.2 V at
–
35
–
–
–
–
6
–
–
–
400
100
28
–
V
DDD
≥ 2.7V
dB
V
DDD
≤ 2.7V
–
µA
–
V
–40°C
≥ 2.2 V at
M Ω –
Table 11
Spec ID Parameter
SID91
SID258 TRESP2
SID92
Comparator AC specifications
TRESP1
TRESP3
Description
Response time, normal mode, 50 mV overdrive
Response time, low power mode, 50 mV overdrive
Response time, ultra-low power mode, 200 mV overdrive
Min
–
–
–
Typ
38
70
2.3
Max Units Details/conditions
110 ns
–
200 –
15 µs
V
–40°C
≥ 2.2 V at
Datasheet 27 002-00123 Rev. *O
2022-07-28
PSoC™ 4 MCU: PSoC™ 4000S
Based on Arm® Cortex®-M0+ CPU
Electrical specifications
6.3.2
CSD and IDAC
Table 12
Spec ID
SYS.PER#3
SID308
SID308A
SID309
CSD and IDAC specifications
VDD_RIPPLE
SYS.PER#16 VDD_RIPPLE_1.8
SID.CSD.BLK ICSD
SID.CSD#15 V
SID.CSD#15A V
SID.CSD#16 IDAC1IDD
SID.CSD#17 IDAC2IDD
VCSD
V
Parameter
REF
REF_EXT
COMPIDAC
IDAC1DNL
Description
Max allowed ripple on power supply,
DC to 10 MHz
Max allowed ripple on power supply,
DC to 10 MHz
Maximum block current
Min Typ
–
–
–
–
–
–
Max Units Details/conditions
±50 mV
V
DD
> 2 V (with ripple),
A
,
Sensitivity = 0.1 pF
±25
4000 mV
µA
V
DD
> 1.75 V (with ripple), 25°C T
Parasitic Capacitance
(C
P
) < 20 pF,
A
,
Sensitivity ≥ 0.4 pF
Maximum block current for both IDACs in dynamic (switching) mode including comparators, buffer, and reference generator.
Voltage reference for CSD and comparator
External Voltage reference for CSD and comparator
IDAC1 (7-bits) block current
0.6
0.6
–
1.2 V
–
–
V
DDA
DDA
– 0.6
– 0.6
V
1750
V
V whichever is lower
V
DDA
DDA
– 0.6 or 4.4 V,
– 0.6 or 4.4 V, whichever is lower
µA –
IDAC2 (7-bits) block current
Voltage range of operation
–
1.71
–
–
1750
5.5
µA –
V
1.8 V ± 5% or 1.8
V to
5.5 V
Voltage compliance range of IDAC
0.6
DNL –1
–
–
V
DDA
– 0.6
V
1 LSB –
V
DDA
– 0.6 or 4.4 V, whichever is lower
SID310
SID311
SID312
IDAC1INL
IDAC2DNL
IDAC2INL
INL –2
DNL –1
–2
–
–
–
2
1
2
V
LSB –
DDA
< 2 V
SID313
SID314
SID314A
SNR
IDAC1CRT1
IDAC1CRT2
INL
Ratio of counts of finger to noise.
Guaranteed by characterization
Output current of
IDAC1 (7 bits) in low range
Output current of
IDAC1 (7 bits) in medium range
5
4.2
34
–
–
–
–
5.4
41
Ratio
V
DDA
< 2 V
Capacitance range of
5 pF to 35 pF, 0.1-pF sensitivity. All use cases.
V
DDA
> 2 V.
µA LSB = 37.5-nA typ.
µA LSB = 300-nA typ.
Datasheet 28 002-00123 Rev. *O
2022-07-28
PSoC™ 4 MCU: PSoC™ 4000S
Based on Arm® Cortex®-M0+ CPU
Electrical specifications
Table 12
Spec ID
SID314B
SID314C
SID314D
SID314E
SID315
SID315A
SID315B
SID315C
SID315D
SID315E
SID315F
SID315G
SID315H
SID320
SID321
SID322
CSD and IDAC specifications
(continued)
Parameter Description Min Typ
IDAC1CRT3
IDAC1CRT12
Output current of
IDAC1 (7 bits) in high range
Output current of
IDAC1 (7 bits) in low range, 2X mode
275
8
–
–
IDAC1CRT22
IDAC1CRT32
IDAC2CRT1
IDAC2CRT2
Output current of
IDAC1 (7 bits) in medium range, 2X mode
Output current of
IDAC1 (7 bits) in high range, 2X mode
Output current of
IDAC2 (7 bits) in low range
Output current of
IDAC2 (7 bits) in medium range
69
540
4.2
34
–
–
–
–
IDAC2CRT3
IDAC2CRT12
IDAC2CRT22
IDAC2CRT32
IDAC3CRT13
IDAC3CRT23
IDAC3CRT33
Output current of
IDAC2 (7 bits) in high range
Output current of
IDAC2 (7 bits) in low range, 2X mode
Output current of
IDAC2 (7 bits) in medium range, 2X mode
Output current of
IDAC2 (7 bits) in high range, 2X mode
Output current of
IDAC in 8-bit mode in low range
Output current of
IDAC in 8-bit mode in medium range
Output current of
IDAC in 8-bit mode in high range
275
8
69
540
8
69
540
–
–
–
–
–
–
–
IDACOFFSET All zeroes input – –
IDACGAIN
IDACMISMATCH1
Full-scale error less offset
Mismatch between
IDAC1 and IDAC2 in
Low mode
–
–
–
–
Max Units Details/conditions
330 µA LSB = 2.4-µA typ.
10.5
82
660
5.4
41
330
10.5
82
660
10.5
82
660
1
±10
9.2
µA LSB = 75-nA typ.
µA LSB = 600-nA typ.
µA LSB = 4.8-µA typ.
µA LSB = 37.5-nA typ.
µA LSB = 300-nA typ.
µA LSB = 2.4-µA typ.
µA LSB = 75-nA typ.
µA LSB = 600-nA typ.
µA LSB = 4.8-µA typ.
µA LSB = 37.5-nA typ.
µA LSB = 300-nA typ.
µA LSB = 2.4-µA typ.
LSB
Polarity set by Source or
Sink. Offset is 2 LSBs for
37.5 nA/LSB mode
% –
LSB LSB = 37.5-nA typ.
Datasheet 29 002-00123 Rev. *O
2022-07-28
PSoC™ 4 MCU: PSoC™ 4000S
Based on Arm® Cortex®-M0+ CPU
Electrical specifications
Table 12
Spec ID
SID322A
SID322B
SID323
SID324
SID325
CSD and IDAC specifications
(continued)
Parameter Description Min Typ
IDACMISMATCH2
IDACMISMATCH3
Mismatch between
IDAC1 and IDAC2 in
Medium mode
Mismatch between
IDAC1 and IDAC2 in
High mode
–
–
–
–
IDACSET8
IDACSET7
CMOD
Settling time to
0.5 LSB for
8-bit IDAC
Settling time to
0.5 LSB for
7-bit IDAC
External modulator capacitor.
–
–
–
–
–
2.2
Max Units Details/conditions
5.6
LSB LSB = 300-nA typ.
6.8
10
10
–
LSB LSB = 2.4-µA typ.
µs
µs
Full-scale transition. No external load.
Full-scale transition. No external load.
Datasheet 30 002-00123 Rev. *O
2022-07-28
PSoC™ 4 MCU: PSoC™ 4000S
Based on Arm® Cortex®-M0+ CPU
Electrical specifications
6.3.3
Table 13 10-bit CAPSENSE™ ADC specifications
Spec ID Parameter Description
SIDA94 A_RES Resolution
Min
–
SIDA95
SIDA97
SIDA98
10-bit CAPSENSE™ ADC
A-MONO Monotonicity
A_GAINERR Gain error
–
–
–
SIDA99 A_OFFSET Input offset voltage
SIDA100 A_ISAR
SIDA101 A_VINS
SIDA103 A_INRES
SIDA104 A_INCAP
SIDA106 A_PSRR
Current consumption
Input voltage range - single ended
Input resistance
Input capacitance
Power supply rejection ratio
–
–
V
SSA
–
–
–
– SIDA107
SIDA108
A_TACQ
A_CONV8
SIDA108A A_CONV10
Sample acquisition time
Conversion time for 8-bit resolution at conversion rate = Fhclk/(2^(N+2)). Clock frequency = 48 MHz.
Conversion time for 10-bit resolution at conversion rate = Fhclk/(2^(N+2)). Clock frequency = 48 MHz.
SIDA109
SIDA110
SIDA111
SIDA112
A_SND
A_BW
A_INL
A_DNL
Signal-to-noise and
Distortion ratio (SINAD)
Input bandwidth without aliasing
Integral Non Linearity.
1 ksps
Differential Non Linearity.
1 ksps
–
–
–
–
–
–
–
2.2
20
Typ Max Units Details/conditions
–
–
10
16 bits
Auto-zeroing is required every millisecond
Defined by AMUX
Bus.
– –
–
–
–
±2
3
0.25
Yes –
%
In V with V
(2.4 V) mode
DDA
bypass capacitance of
10 µF mV
In V with V
(2.4 V) mode
DDA
bypass capacitance of
10 µF mA –
60
1
–
–
61
–
V
DDA
–
–
–
–
21.3
85.3
–
V –
K Ω – pF – dB
In V with V
(2.4 V) mode
DDA
bypass capacitance of
10 µF
µs –
µs
Does not include acquisition time.
Equivalent to
44.8 ksps including acquisition time.
µs dB
Does not include acquisition time.
Equivalent to
11.6 ksps including acquisition time.
With 10-Hz input sine wave, external
2.4-V reference,
V
REF
(2.4 V) mode
22.4
kHz 8-bit resolution
–
–
2
1
LSB V REF
= 2.4 V or greater
LSB –
Datasheet 31 002-00123 Rev. *O
2022-07-28
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Table of contents
- 1 General description
- 1 Features
- 3 Table of contents
- 4 1 Development ecosystem
- 4 1.1 PSoC™ 4 MCU resources
- 5 1.2 ModusToolbox™ software
- 6 1.3 PSoC™ Creator
- 7 Block diagram
- 9 2 Functional description
- 10 3 Functional definition
- 10 3.1 CPU and memory subsystem
- 10 3.2 System resources
- 12 3.3 Analog blocks
- 12 3.4 Programmable digital blocks
- 13 3.5 Fixed function digital
- 14 3.6 GPIO
- 14 3.7 Special function peripherals
- 15 4 Pinouts
- 17 4.1 Alternate pin functions
- 19 5 Power
- 19 5.1 Mode 1: 1.8 V to 5.5 V external supply
- 20 5.2 Mode 2: 1.8 V ± 5% external supply
- 21 6 Electrical specifications
- 21 6.1 Absolute maximum ratings
- 22 6.2 Device level specifications
- 27 6.3 Analog peripherals
- 32 6.4 Digital peripherals
- 36 6.5 Memory
- 37 6.6 System resources
- 41 7 Ordering information
- 43 8 Packaging
- 44 8.1 Package diagrams
- 49 9 Acronyms
- 53 10 Document conventions
- 53 10.1 Units of measure
- 54 Revision history