5 Power. Infineon CY8C4045LQI-S412, CY8C4045LQI-S413, CY8C4025AZI-S413T, CY8C4024LQI-S412, CY8C4025AZQ-S403, CY8C4024LQI-S403T, CY8C4025LQI-S412, CY8C4025LQI-S402T, CY8C4045LQI-S411, CY8C4024AXI-S412

PSoC™ 4 MCU: PSoC™ 4000S

Based on Arm® Cortex®-M0+ CPU

Power

5 Power

The following power system diagram shows the set of power supply pins as implemented for the PSoC™ 4000S.

The system has one regulator in Active mode for the digital circuitry. There is no analog regulator; the analog circuits run directly from the V

DD

input.

VDDA

VDDA

VSSA

Analog

Domain

VDDD

Digital

Domain

VSSD

VDDD

VCCD

1.8 Volt

Regulator

Figure 4 Power supply connections

There are two distinct modes of operation. In Mode 1, the supply voltage range is 1.8 V to 5.5 V (unregulated externally; internal regulator operational). In Mode 2, the supply range is1.8 V ± 5% (externally regulated; 1.71 V to 1.89 V, internal regulator bypassed).

5.1

Mode 1: 1.8 V to 5.5 V external supply

In this mode, the PSoC™ 4000S is powered by an external power supply that can be anywhere in the range of

1.8 V to 5.5 V. This range is also designed for battery-powered operation. For example, the chip can be powered from a battery system that starts at 3.5 V and works down to 1.8 V. In this mode, the internal regulator of the

PSoC™ 4000S supplies the internal logic and its output is connected to the V

CCD

pin. The VCCD pin must be bypassed to ground via an external capacitor (0.1 µF; X5R ceramic or better) and must not be connected to anything else.

Datasheet 19 002-00123 Rev. *O

2022-07-28