Programming hints for the synchronization primitives. STMicroelectronics STM32H7S3L8, STM32H7R3L8, STM32H7S7A8, STM32H7R3V8, STM32H7R3R8, STM32H7S3Z8, STM32H7S3I8, STM32H7S3V8, STM32H7S7Z8, STM32H7R7I8
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The Cortex-M7 processor
2.3.7
PM0253
Software can use the synchronization primitives to implement a semaphore as follows:
1.
Use a Load-Exclusive instruction to read from the semaphore address to check whether the semaphore is free.
2. If the semaphore is free, use a Store-Exclusive to write the claim value to the semaphore address.
3. If the returned status bit from step 2 indicates that the Store-Exclusive succeeded then the software has claimed the semaphore. However, if the Store-Exclusive failed, another process might have claimed the semaphore after the software performed step
1.
The Cortex
®
-M7 processor includes an exclusive access monitor, that tags the fact that the processor has executed a Load-Exclusive instruction. If the processor is part of a multiprocessor system and the address is in a shared region of memory, the system also globally tags the memory locations addressed by exclusive accesses by each processor.
The processor removes its exclusive access tag if:
• It executes a CLREX instruction.
• It executes a STREX instruction, regardless of whether the write succeeds.
• An exception occurs. This means the processor can resolve semaphore conflicts between different threads.
In a multiprocessor implementation:
• Executing a CLREX instruction removes only the local exclusive access tag for the processor.
• Executing a STREX instruction, or an exception, removes the local exclusive access tags for the processor.
• Executing a STREX instruction to a shared memory region can also remove the global exclusive access tags for the processor in the system.
For more information about the synchronization primitive instructions, see
Programming hints for the synchronization primitives
ISO/IEC C cannot directly generate the exclusive access instructions. CMSIS provides intrinsic functions for generation of these instructions:
Table 18. CMSIS functions for exclusive access instructions
Instruction CMSIS function
LDREX
LDREXH
LDREXB
STREX
STREXH
STREXB
CLREX uint32_t __LDREXW (uint32_t *addr) uint16_t __LDREXH (uint16_t *addr) uint8_t __LDREXB (uint8_t *addr) uint32_t __STREXW (uint32_t value, uint32_t *addr) uint32_t __STREXH (uint16_t value, uint16_t *addr) uint32_t __STREXB (uint8_t value, uint8_t *addr) void __CLREX (void)
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