The Cortex-M7 instruction set
3.4.8 PUSH and POP
Push registers onto, and pop registers off a full-descending stack.
Syntax
PM0253
PUSH{ cond } reglist
POP{ cond } reglist
Where: cond reglist
Is an optional condition code. See Conditional execution on page 68 .
Is a non-empty list of registers, enclosed in braces. It can contain register ranges. It must be comma separated if it contains more than one register or register range.
PUSH and POP are synonyms for STMDB and LDM (or LDMIA) with the memory addresses for the access based on SP, and with the final address for the access written back to the SP. PUSH and POP are the preferred mnemonics in these cases.
Operation
PUSH stores registers on the stack, with the lowest numbered register using the lowest memory address and the highest numbered register using the highest memory address.
POP loads registers from the stack, with the lowest numbered register using the lowest memory address and the highest numbered register using the highest memory address.
PUSH uses the value in the SP register minus four as the highest memory address, POP uses the value in the SP register as the lowest memory address, implementing a fulldescending stack. On completion, PUSH updates the SP register to point to the location of the lowest store value, POP updates the SP register to point to the location above the highest location loaded.
If a POP instruction includes PC in its reglist, a branch to this location is performed when the
POP instruction has completed. Bit[0] of the value read for the PC is used to update the
APSR T-bit. This bit must be 1 to ensure correct operation.
See
LDM and STM on page 79 for more information.
Restrictions
In these instructions:
• reglist must not contain SP.
• For the PUSH instruction, reglist must not contain PC.
• For the POP instruction, reglist must not contain PC if it contains LR.
When PC is in reglist in a POP instruction:
• Bit[0] of the value loaded to the PC must be 1 for correct execution, and a branch occurs to this halfword-aligned address.
• If the instruction is conditional, it must be the last instruction in the IT block.
Condition flags
These instructions do not change the flags.
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