SARADC Queued digital interface (ADCQ) RM0421
39.3.7 Queue DMA
In a queue module, command queue (CMDQ) and data queue (DATAQ) have independent
DMA interfaces. When DMA mode is selected for the queue and DMA interface is enabled then DMA transfers are used to fill the CMDQ and empty the DATAQ.
39.3.7.1 CMDQ DMA
In CMDQ DMA the DMA controller transfers the commands to the CMDQ. When the number of free entries in the CMDQ is greater than or equal to the command queue watermark then the CMDQ will assert its DMA request.
The DMA transfer configuration (TCD) can be programmed to transfer the same number of
32-bit words in its minor loop as defined by the command queue watermark. If the number of commands in a measurement sequence is not a multiple of the command queue watermark then two transfer configuration structures are needed.
Example 1
Depth of CMDQ = 32
CMDQ is empty = true
CMDQ WM = 4
Number of commands in a measurement sequence = 8
Number of TCD = 1
Number of words transferred per minor loop = CMDQ WM = 4
Number of minor loops per major loop = 2
Since CMDQ is empty it has 32 free entries so it will keep its DMA request asserted. In the first minor loop 4 words are transferred. The DMA request is still kept asserted so the second minor loop executes and transfers the next 4 commands. The DMA request is still kept asserted since the number of free entries is greater than the watermark. The
DMA controller can be programmed to disable its DREQ input on completion of a major loop.
Example 2
Depth of CMDQ = 32
CMDQ is empty = true
CMDQ WM = 4
Number of commands in a measurement sequence = 9
Number of TCDs required = 2
Number of words transferred per minor loop of the first TCD = CMDQ WM = 4
Number of minor loops in the first TCD major loop = 2
Number of words transferred the minor loop of the second TCD = 1
Number of minor loops in the major loop of the second TCD = 1
First TCD will transfer 8 words and the second TCD will transfer 1 word.
Since CMDQ is empty it has 32 free entries so it will keep its DMA request asserted. In the first minor loop of the first TCD 4 words are transferred. The DMA request is still kept asserted so the second minor loop of the first TCD executes and transfers the next
4 commands. The DMA request is still kept asserted since the number of free entries is greater than the watermark. In the first minor loop of the second TCD the last word is
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Example 3
Depth of CMDQ = 32
CMDQ is empty = No
CMDQ free entries = 4
CMDQ WM = 4
Number of commands in a measurement sequence = 8
Number of TCDs = 1
Number of words transferred per minor loop = CMDQ WM = 4
Number of minor loops in the major loop = 2
The CMDQ will assert its DMA request as soon as 4 entries are free. The first minor loop starts transferring 4 words. On receiving the first word the CMDQ DMA will deassert its DMA request since number of free entries is less than the watermark (4).
After completing the first minor loop the DMA controller stops and waits for the DMA request to be reasserted before transferring the remaining 4 commands. On the second DMA request the DMA controller will execute its second minor loop and transfer the remaining 4 commands.
39.3.7.2 DATAQ DMA
The DATAQ DMA interface behaves differently to the CMDQ DMA. In the DATAQ DMA the
DATAQ transfers data to the DMA controller. The difference arises in the transfer of the last words of sequence data. When the number of entries in the DATAQ reaches the watermark level then the DATAQ will assert its DMA request. A DATAQ DMA request is always asserted if it receives the last data of a sequence.
The DMA TCD should be programmed to transfer the same number of 32-bit words in its minor loop as defined by the data queue watermark.
If the number of data words in a measurement sequence is not a multiple of the data queue watermark then two TCD structures are needed.
Example 1 : One measurement sequence returning 8 ADC data words.
Depth of DATAQ = 32
DATAQ is empty = No
DATAQ free entries = 4
DATAQ WM = 4
Number of measurement sequences = 1
Number of expected data words for a measurement sequence = 8
Number of TCDs = 1
Number of words transferred per minor loop = DATAQ WM = 4
Number of minor loops per major loop = 2
Since the DATAQ WM is 4, the DATAQ DMA will assert its DMA request after receiving
4 ADC data words. The first minor loop of the DMA controller will read 4 words. After reading the first word, the DATAQ will de-assert its DMA request since the number of words left is less than the DATAQ WM. The DMA controller will complete the first minor loop after reading the remaining 3 words and then wait for the DMA request to be
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DMA request is reasserted. The second minor loop will execute in the same way as the first loop.
Example 2 : One measurement sequence returning 9 ADC data words.
Depth of DATAQ = 32
DATAQ is empty = No
DATAQ WM = 4
Number of measurement sequences = 1
Number of expected data words for a measurement sequence = 9
Number of TCDs = 2
Number of words transferred in a minor loop of first TCD = DATAQ WM = 4
Number of minor loops per major loop of the first TCD = 2
Number of words transferred in the minor loop of the second TCD = 1
Number of minor loops in the major loop of the second TCD = 1
The first TCD executes as described int the DATAQ example 1. Once 8 words are transferred then only one word is left to be transferred for the measurement sequence.
The DATAQ DMA also keeps track of the ADC sequence length along with the watermark level. So for the 9th word, the WM level is not reached but since it is the last word of the sequence the DMA DATAQ will assert its DMA request and the first minor loop of second TCD will get activated and transfer only one word. When the last word is read the DMA controller will de-assert its DMA request.
If the DMA controller is programmed incorrectly and the first minor loop of the second
TCD is programmed to transfer more than 1 data word, then the DATAQ DMA will report an underflow error.
Example 3 : Two measurement sequences each having single conversions only.
Depth of DATAQ = 32
DATAQ is Empty = No
DATAQ WM = 4
Number of measurement sequence = 2
Number of expected data words for first measurement sequence = 1
Number of expected data words for second measurement sequence = 1
Number of TCDs required = 1
Number of words transferred in one minor loop of TCD = 1
Number of minor loops in one major loop = 2
This example illustrates the case of two back to back single conversions. The DATAQ will assert its DMA request as soon as the ADC data is available for the first sequence, even if the WM is not reached since it is the last data word of the first sequence. The first minor loop will read the data word. After the first read is completed and if the data for the next measurement sequence is not available, then the DATAQ will de-assert its
DMA request. When the second data word arrives the above operation is repeated.
If the second data word becomes available before the first is read, then the DATAQ
DMA will keep its DMA request asserted, the second data also being the last data word of a sequence. The DMA controller will execute both minor loops.
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