FlexRay communication controller (FlexRay) RM0421 f
CHI
≥ 18 MHz
≥ 23 MHz
≥ 27 MHz
≥ 32 MHz
≥ 60 MHz
≥ 80 MHz
Table 1424. Maximum SYMATOR[TIMEOUT] examples
SYMATOR[TIMEOUT]
0
≤ 2
≤ 4
≤ 6
≤ 19
≤ 28 f
CHI
≥ 100 MHz
≥ 120 MHz
≥ 140 MHz
≥ 160 MHz
≥ 180 MHz
≥ 200 MHz
SYMATOR[TIMEOUT]
≤ 37
≤ 46
≤ 55
≤ 64
≤ 73
≤ 82
53.7.1.1.1 System bus wait state constraints
The SYMATOR[TIMEOUT] value corresponds directly to a certain acceptable number of wait states on the system bus.
For single-channel configurations and situations in which the sync frame table generation functionality is not used (FR_SFTCCSR[SDVEN,SIDEN] = 0), no timeout will be detected if fewer than 2 × SYMATOR[TIMEOUT] + 1 wait states will be seen on the system bus for each system bus access.
For dual-channel configurations, or situations in which the sync frame table generation functionality is used, no timeout will be detected if fewer than SYMATOR[TIMEOUT] – 1 wait states will be seen on the system bus for each system bus access.
53.7.1.2 Configure data field offsets
The data field offsets are located in the Message Buffer Data Field Offset Registers
(FR_MBDORn) and Receive FIFO Start Data Offset Register (FR_RFSDOR). The application has to configure the data field offset values for all message buffers that are used.
When the module is enabled, the initialization value of the FR_MBDOR n [MBDO] and
FR_RFSDOR[SDO] is 0. This value is considered to be illegal (refer to
Section 53.6.19.1.1
).
53.7.2 Initialization sequence
This section describes the steps required to initialize the CC. The first subsection describes the steps required after a system reset; the second section describes the steps required after preceding shutdown of the CC.
53.7.2.1 Module initialization
This section describes the module-related initialization steps after a system reset.
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1.
Configure the CC.
a) Configure the control bits in the Module Configuration Register (FR_MCR).
b) Configure the system memory base address in the System Memory Base Address
Register (FR_SYMBADR).
2. Enable the CC.
a) Write 1 to the module enable bit MEN in the Module Configuration Register
(FR_MCR).
The CC now enters Normal mode. The application can commence with the protocol initialization described in
Section 53.7.2.2
.
53.7.2.2 Protocol initialization
This section describes the protocol-related initialization steps.
1.
Configure the Protocol Engine.
a) Issue CONFIG command via the Protocol Operation Control Register
(FR_POCR).
b) Wait for POC:config in the Protocol Status Register 0 (FR_PSR0).
c) Configure the FR_PCR0, … , FR_PCR30 registers to set all protocol parameters.
2. Configure the message buffers and FIFOs.
a) Set the number of message buffers used and the message buffer segmentation in the Message Buffer Segment Size and Utilization Register (FR_MBSSUTR).
b) Define the message buffer data size in the Message Buffer Data Size Register
(FR_MBDSR).
c) Configure each message buffer by setting the configuration values in the Message
Buffer Configuration, Control, Status Registers (FR_MBCCSRn), Message Buffer
Cycle Counter Filter Registers (FR_MBCCFRn), Message Buffer Frame ID
Registers (FR_MBFIDRn), and Message Buffer Index Registers (FR_MBIDXRn).
d) Configure the FIFOs.
e) Issue CONFIG_COMPLETE command via the Protocol Operation Control
Register (FR_POCR).
f) Wait for POC:ready in the Protocol Status Register 0 (FR_PSR0).
After this sequence, the CC is configured as a FlexRay node and is ready to integrate into the FlexRay cluster.
53.7.2.3 CHI LRAM initialization
The CHI LRAM initialization is performed by the CC when it leaves Disabled mode. The initialization runs for 87 CHI clock cycles. All fields in the FR_MBCCSR n , FR_MBCCFR n ,
FR_MBFIDR n , FR_MBDOR n and LEETR n registers are initialized to 0. All application read or write accesses to these registers are delayed until the initialization is finished.
53.7.2.4 PE DRAM initialization
The PE DRAM initialization is performed by the CC in the POC:default config state. This initialization runs for 4.8
μ s and will delay the state transition from POC:default config into
POC:config .
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