RM0421 Register Protection (REG_PROT)
• Area 4 is 1.5 KB and holds the Soft Lock Bits, one bit per byte in area 1. The four Soft
Lock Bits associated with one module register word are arranged at byte boundaries in the memory map. The Soft Lock Bit registers can be directly written using a bit mask.
• Area 5 is 512 bytes large and holds the configuration bits of the protection mode. There is one configuration hard lock bit per module that prevents all further modifications to the Soft Lock Bits and can only be cleared by a system reset once set. The other bits, if set, will allow user access to the protected module.
If any locked byte is accessed with a write transaction, a transfer error will be issued to the system and the write transaction will not be executed. This is true even if not all accessed bytes are locked.
Accessing unimplemented 32-bit registers in Areas 4 and 5 will result in a transfer error.
85.3.1 Memory map
Table 2206 shows the memory map for a module which is protected via a REG_PROT
module.
Offset
Table 2206. REG_PROT memory map
Use Location
0x0000
0x0001
Module Register 0 (MR0)
Module Register 1 (MR1)
Section 85.3.2.1
Section 85.3.2.1
0x0002 Module Register 2 (MR2)
Section 85.3.2.1
0x0003 - 0x17FF Module Register 3 (MR3) - Module Register 6143(MR6143)
Section 85.3.2.1
0x1800 - 0x1FFF Reserved
0x2000
0x2001
0x2002 - 0x37FF
Module Register 0 (MR0) + Set Soft Lock Bit 0 (LMR0)
Module Register 1 (MR1) + Set Soft Lock Bit 1 (LMR1)
Module Register 2 (MR2) + Set Soft Lock Bit 2 (LMR2) -
Module Register 6143 (MR6143) + Set Soft Lock Bit 6143
(LMR6143)
Section 85.3.2.2
Section 85.3.2.2
Section 85.3.2.2
0x3800
0x3801
0x3802 -
0x3DFF
Soft Lock Bit Register 0 (SLBR0): Soft Lock Bits 0-3
Soft Lock Bit Register 1 (SLBR1): Soft Lock Bits 4-7
Soft Lock Bit Register 2 (SLBR2): Soft Lock Bits 8-11 -
Soft Lock Bit Register 1535 (SLBR1535): Soft Lock Bits 6140-
6143
Section 85.3.2.3
Section 85.3.2.3
Section 85.3.2.3
0x3E00 -
0x3FFB
0x3FFC
Reserved
Global Configuration Register (GCR)
Section 85.3.2.4
Note: Reserved registers in area #1 will be handled as specified in the protected module’s documentation.
RM0421 Rev 5
3763/4101
3771
