RESET, START-UP, AND INTERRUPTS. Qwiic QuickLogic Thing Plus - EOS S3

Chapter 31.

Reset, start-up, and interrupts

This chapter covers system reset and general handling of interrupts. For discussion of interrupts and the

NVIC and the WIC hardware modules for interrupts see:

• Wakeup Interrupt Controller

• Nested Vectored Interrupt Controller (NVIC) and ARM documentation for the NVIC.

31.1

Reset

There are multiple reset sources: hardware (2) and software (1).

•

Power-ON-Reset (POR) - automatically performed by the S3 after power is applied

• system reset through SYS_RSTn pin - requires physical signal to the pin

• software reset - performed by a write to a register

After booting up, the firmware can program to block the system reset (SYS_RSTn pin) and treat it as one of the interrupt sources.

The following diagram illustrates power sequence waveform.

Figure 31-1: Power-up Sequence

For more details see Datasheet for timing details.

EOS S3 TRM (r1.01a) Confidential Page 290