Configuration State Machine General Operation. Qwiic QuickLogic Thing Plus - EOS S3

33.3

Configuration State Machine General Operation

Configuration Logic is responsible for:

•

Reading the external flash device

•

Configuring its SPI transfer parameters using data stored within the external flash devices

•

Confirming that the boot code is compatible with the EOS S3 device using stored values in the external flash.

•

Loading the boot code into M4-F memory and enabling the M4-F execution once the boot code transfer has completed.

•

Minimizing the elapsed time for booting the M4-F by using DMA transfers of boot code from the external .flash

•

Posting status bits to the M4-F that aid in diagnosing the state of the boot process

The Configuration State Machine is a finite-state-machine (FSM) which can execute 4 different microcode sequences.

•

Read Header Contents from Flash

•

Download Boot Image from Flash

•

Deep Sleep Off Mode

Figure 31-2 illustrates how the Configuration State Machine works once the Host bootstrap is selected

(GPIO_20 = pull down) and reset is deasserted.

33.4

Read Header Contents from Flash

The CfgSM will download the flash header from the SPI Flash. This header requires the following information and format in table below.

Table 33-1: Flash Boot Header

Flash Boot Header Fields

Device ID

SPI Transmit Clock Divider

Boot Size in Frames

Bit Field

[31:24]

[23:16]

[15:0]

Value

0x20

X

Y

Description

This value is required for EOS S3.

This X value multiplied by 2 is used to program the SPI_BAUDR register which controls the SPI Master clock output to SPI

Flash.

If X = 2, then 4 is programmed to SPI_BAUDR, which is 3.21 Mhz.

This Y is boot size minus 1 in double words.

If Y = 0x1FF, then 4096 bytes will be downloaded from SPI Flash. Frame size is 8 bytes.

The values in the header are stored in a register and used by the CfgSM to setup the various values, like DMA transfer size and SPI clock. The Device ID in the header must match the value 0x20 for EOS S3.

Note: If the

Device ID does not match, the header will be read three more times and checked. If, after the fourth time, the

Device ID still does not match, the flash will be put in deep sleep and the device error state will be entered.

There is a timer delay between successive reads of the header. Once the CfgSM enters the device error state, it can only be restarted by asserting the reset signal.

EOS S3 TRM (r1.01a) Confidential Page 309