Hardware sources for exiting low power mode. Qwiic QuickLogic Thing Plus - EOS S3

32.2.3.2

Hardware sources for exiting low power mode

The following table summarizes for each power domain. These are the hardware sources that can initiate the mode change.

Table 32-5: Hardware sources that can cause exit from low power mode

Power Domain

M4

FFE

FB

PF

AD0

AD1

AD2

AD3

AD4

AD5

A1 eFuse

I2S

SDMA

M4SRAM

PF SRAM

FFE SRAM

AD1 SRAM

AD2 SRAM

SDMA SRAM

Hardware Source to Exit Low Power Mode

Interrupts (WIC)

Sensor/GPIO INTs will be used to wake the FFE sampling timer, but will not be used to wake up FFE directly

Sensor/GPIO Interrupts or

FFE Sampling Timer

–

LPSD or

GPIO/LPSD

LPSD or

GPIO/LPSD

LPSD or

GPIO/LPSD

LPSD or

GPIO/LPSD

LPSD or

GPIO/LPSD

LPSD or

GPIO/LPSD

–

–

–

–

PF SRAM will exit DS mode when PF exits low-power mode

FFE SRAM will exit DS mode when FFE exits low-power mode

AD1 SRAM will exit DS mode when AD1 exits low-power mode

AD2 SRAM will exit DS mode when AD2 exits low-power mode

SDMA SRAM will exit DS mode when SDMA exits low-power mode

Maskable?

Yes

Yes

Yes

Yes

–

–

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

–

–

–

No

No

No

No

No

EOS S3 TRM (r1.01a) Confidential Page 301